Method for fabricating optical semiconductor device

ABSTRACT

A method for fabricating an optical semiconductor device, including: melting a solder supplied on a carrier; mounting a semiconductor laser chip on the melted solder with a tool for holding the semiconductor laser chip; cooling the solder; releasing the tool from the semiconductor laser chip after the solder is cooled; remelting the solder after the tool is released from the semiconductor laser chip; and recooling the remelted solder.

CROSS-REFERENCE TO RELATED APPLICATION

This application is based upon and claims the benefit of priority of theprior Japanese Patent Application No. 2010-270799, filed on Dec. 3,2010, the entire contents of which are incorporated herein by reference.

BACKGROUND

(i) Technical Field

A certain aspect of the embodiments discussed herein is related to amethod for fabricating an optical semiconductor device.

(ii) Related Art

There is known an optical semiconductor device in which a semiconductorlaser and a related optical component are integrated and mounted on acarrier (see Japanese Patent Application Publication No. 2004-289011).When an optical component such as the semiconductor laser is mounted onthe carrier, a solder supplied on the surface of the carrier is melted,the optical component is mounted and positioned on the solder, and thenthe solder is cooled and the optical component is fixed to the carrier.

SUMMARY

However, the present inventor has found a problem that the opticalcomponent warps after the solder is cooled by using the above-mentionedmethod.

It is an object of the present invention to provide a method forfabricating an optical semiconductor device that can restrain warpage ofthe optical component mounted on the carrier.

According to an aspect of the present invention, there is provided amethod for fabricating an optical semiconductor device, including:melting a solder supplied on a carrier; mounting a semiconductor laserchip on the melted solder with a tool for holding the semiconductorlaser chip; cooling the solder; releasing the tool from thesemiconductor laser chip after the solder is cooled; remelting thesolder after the tool is released from the semiconductor laser chip; andrecooling the remelted solder.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a diagram of a configuration of an semiconductor laser to bemounted on an optical semiconductor device;

FIG. 2 is a flowchart of a method for fabricating the opticalsemiconductor device;

FIGS. 3A to 3D are cross-sectional diagrams illustrating the method forfabricating the optical semiconductor device;

FIG. 4A is a cross-sectional diagram of a tool;

FIG. 4B is a top view of the tool, as viewed from a front edgedirection;

FIG. 5A is a schematic top view of the semiconductor laser;

FIG. 5B is a schematic view in the case where a layer containing anoptical waveguide layer is seen through from an upper surface;

FIG. 6 is a top view illustrating the method for fabricating the opticalsemiconductor device;

FIG. 7A is a schematic cross-sectional diagram of the opticalsemiconductor device fabricated by a conventional method;

FIG. 7B is a schematic cross-sectional diagram of the opticalsemiconductor device fabricated by a method of the present embodiment;

FIG. 8 is a graph indicating a measurement result of a warpage amount ofan optical component;

FIG. 9 is a flowchart of the method for fabricating the opticalsemiconductor device according to a second embodiment; and

FIG. 10 is a top view of the optical semiconductor device according to athird embodiment.

DETAILED DESCRIPTION

FIG. 1 is a schematic cross-sectional diagram of the whole configurationof a semiconductor laser 60 to be mounted on an optical semiconductordevice according to a first embodiment. As illustrated in FIG. 1, thesemiconductor laser 60 has a structure in which a SOA (SemiconductorOptical Amplifier) region C, a SG-DFB (Sampled Grating DistributionFeedback) region A, and a CSG-DBR (Chirped Sample Grating DistributedReflector) region B are coupled in order. In the semiconductor laser 60,the SG-DFB region A and the CSG-DBR region B function as a wavelengthselection portion selecting a wavelength, and the SOA region C functionsas a light amplification portion amplifying a laser light.

The SG-DFB region A has a structure in which a lower cladding layer 2,an active layer 3, an upper cladding layer 6, a contact layer 7 and anelectrode 8 are laminated on a substrate 1. The CSG-DBR region B has astructure in which the lower cladding layer 2, an optical waveguidelayer 4, the upper cladding layer 6, an insulating layer 9 and heaters10 are laminated on the substrate 1. Each of the heaters 10 has a powersupply electrode 11 and a ground electrode 12. The SOA region C has astructure in which the lower cladding layer 2, an optical amplificationlayer 19, the upper cladding layer 6, a contact layer 20 and anelectrode 21 are laminated on the substrate 1.

The substrate 1, the lower cladding layer 2 and the upper cladding layer6 of the SG-DFB region A, the CSG-DBR region B and the SOA region C areformed as a unit respectively. The active layer 3, the optical waveguidelayer 4, and the optical amplification layer 19 are formed on the sameplane. An AR (Anti Reflection) layer 16 is formed on an facet of thesubstrate 1, the lower cladding layer 2, the active layer 3 and theupper cladding layer 6 on the side of the SOA region C. The AR layer 16acts as a front facet of the semiconductor laser 60. A reflection layer17 is formed on an facet of the substrate 1, the lower cladding layer 2,the optical waveguide layer 4, and the upper cladding layer 6 on theside of the CSG-DBR region B. The reflection layer 17 acts as a rearfacet of the semiconductor laser 60.

A plurality of diffraction gratings (corrugations) 18 are formed in thelower cladding layer 2 of the SG-DFB region A and the CSG-DBR region Bin a given interval. The SG-DFB region A and the CSG-DBR region B have aplurality of segments. The segment is a region in which one regionhaving the diffraction grating 18 and one space portion not having thediffraction grating 18 are combined. The diffraction grating 18 is madeof a material having a refractive index that is different from that ofthe lower cladding layer 2.

In the CSG-DBR region B, at least two of the segments have a differentoptical length. Thus, intensity of each of reflection peak wavelengthsin the CSG-DBR region B depends on wavelength. On the other hand, eachoptical length of the segments in the SG-DFB region A is substantiallyequal to each other. Therefore, intensity of each of reflection peakwavelengths in the SG-DFB region A does not depend on wavelength.According to the combination of the SG-DFB region A and the CSG-DBRregion B, a desirable wavelength is selected by overlapping thereflection peak wavelength of the SG-DFB region A with the reflectionpeak wavelength of the CSG-DBR region B, by using vernier effect. Thus,the semiconductor laser 60 can perform a stable laser oscillation at thedesirable wavelength.

The substrate 1 is, for example, a crystal substrate made of n-type InP.The lower cladding layer 2 has n-type conductivity. The upper claddinglayer 6 has p-type conductivity. The lower cladding layer 2 and theupper cladding layer 6 are, for example, made of InP. The lower claddinglayer 2 and the upper cladding layer 6 confines a light in the activelayer 3, the optical waveguide layer 4 and the optical amplificationlayer 19.

The active layer 3 is made of semiconductor having a gain. The activelayer 3 may have quantum well structure in which a well layer made ofGa_(0.32)In_(0.68)As_(0.92)P_(0.08) having a thickness of 5 nm and abarrier layer made of Ga_(0.22)In_(0.78)As_(0.47)P_(0.53) having athickness of 10 nm are laminated alternately.

The optical waveguide layer 4 is, for example, made of bulksemiconductor layer, and may be made ofGa_(0.22)In_(0.78)As_(0.47)P_(0.53).

The contact layer 7 is, for example, made of p-type Ga_(0.47)In_(0.53)Ascrystal. The insulating layer 9 is a protective layer made of aninsulator such as SiN or SiO₂. The heater 10 is a thin film resistorsuch as NiCr. Each heater 10 may extend through a plurality of thesegments in the CSG-DBR region B.

The electrodes 8, the power supply electrode 11 and the ground electrode12 are made of conductive material such as Au (gold). A reverse faceelectrode 15 is formed on a lower face of the substrate 1. The reverseface electrode 15 is, for example, made of Au (gold). The reverse faceelectrode 15 extends through the SG-DFB region A, the CSG-DBR region Band the SOA region C.

The optical amplification layer 19 is a region in which a gain is givenby current injection from the electrode 21, and optical amplificationthereby is performed. The optical amplification layer 19 may havequantum well structure in which a well layer made ofGa_(0.35)In_(0.65)As_(0.99)P_(0.01) having a thickness of 5 nm and abarrier layer made of Ga_(0.15)In_(0.85)As_(0.32)P_(0.68) having athickness of 10 nm are laminated alternately, for example. The opticalamplification layer 19 may employ a bulk semiconductor made ofGa_(0.44)In_(0.56)As_(0.95)P_(0.05) as another structure, for example.The contact layer 20 is, for example, made of p-typeGa_(0.47)In_(0.53)As crystal.

Next, a description will be given of an operation of the semiconductorlaser 60. When a predetermined driving current is provided to theelectrode 8, each heater 10 generates heat at a predeterminedtemperature. A TEC (Thermoelectric cooler) controls the temperature ofthe semiconductor laser 60 to be a predetermined temperature. Thus, theSG-DFB region A and the CSG-DBR region B select a wavelength, and thesemiconductor laser 100 oscillates at the wavelength. The laser light isoptically amplified and output from a front facet (on the side of theSOA region C) to outside.

FIG. 2 is a flowchart of a method for fabricating the opticalsemiconductor device according to the first embodiment, and FIGS. 3A to3D are cross-sectional diagrams illustrating the method for fabricatingthe optical semiconductor device. At start time, a heater block 80 forheat supply is provided in a storage 70 in which an opening 72 is formedin a ceiling, as illustrated in FIG. 3A. The inside of the storage 70 isfilled up with an inactive gas (for example, nitrogen gas). First, acarrier 30 is installed on the heater block 80 as illustrated in FIG. 3A(step S10). A solder 40 for fixing the semiconductor laser 60 issupplied on the carrier 30 in advance. For example, AuSn can be used asthe solder 40.

Next, a tool 50 for holding a component moves the semiconductor laser 60above the carrier 30 as illustrated in FIG. 3A (step S12). Thesemiconductor laser 60 is placed inside the storage 70 from the opening72 of the storage 70. The tool 50 has an absorption mechanism at a frontedge thereof, and holds a central portion of the semiconductor laser 60by adsorbing the surface of the semiconductor laser 60 at the frontedge.

FIGS. 4A and 4B illustrate detailed configuration of the tool 50. FIG.4A is a cross-sectional diagram of the tool 50, and FIG. 4B is a topview of the tool 50, as viewed from a front edge direction. The tool 50includes a body portion 52 and a front edge portion 54. An absorptionhole 56 is provided in a central portion of the body portion 52. Thetool 50 comes in contact with the semiconductor laser 60 at a tip of thefront edge portion 54. The front edge portion 54 is divided into two bya groove 58 formed according to the absorption hole 56. The shape of across-sectional surface of each divided edge portion 54 is a substantialsemicircle (see FIG. 4B. A solid line indicates an outline of the frontedge portion 54, and a dotted line indicates an outline of the bodyportion 52 and the absorption hole 56).

FIG. 5A is a schematic top view of the semiconductor laser 60, and FIG.5B is a schematic view in the case where a layer containing the opticalwaveguide layer 4 is seen through from an upper surface. As illustratedin FIG. 5B, a width (W1) of the active layer 3, the optical waveguidelayer 4 and the optical amplification layer 19 are smaller than a width(W2) of the semiconductor laser 60. As illustrated in FIG. 5A, widths ofthe electrodes 8 on the SG-DFB region A and the electrodes 21 on the SOAregion C are larger than the above-mentioned width (W1) of the opticalwaveguide layer 4. When the tool 50 holds the semiconductor laser 60, itis desirable that the tool 50 holds regions (e.g. dotted line regionsindicated by reference numbers 90) corresponding to both sides of theactive layer 3, the optical waveguide layer 4 or the opticalamplification layer 19 in order to avoid adding pressure to the activelayer 3, the optical waveguide layer 4 and the optical amplificationlayer 19 of FIG. 5B. If a tool is the tool 50 having the configurationas illustrated in FIGS. 4A and 4B, the semiconductor laser 60 can beheld by aligning the positions of the groove 58, the activity layer 3,optical waveguide layer 4 and the optical amplification layer 19 so thatthe front edge portion 54 does not press the above-mentioned layers.

Next, the solder 40 on the carrier 30 is melted by raising thetemperature of the heater block 80 and applying heat to the solder 40through the carrier 30 (step S14). When AuSn is used as the solder 40,for example, it is desirable to set a temperature of melting to 290-310°C., and set a time period of melting to 2-6 seconds. Thereby, it ispossible to restrain oxidation of the optical component including thesemiconductor laser 60.

Next, the tool 50 mounts the semiconductor laser 60 on the melted solder40, as illustrated in FIG. 3B (step S16). Then, a cold gas (e.g.nitrogen gas or dry air) is supplied with a gas supply line 74 from theopening 72 of the storage 70, the solder 40 is cooled while the cold gasis blowing, and the melted solder 40 is solidified (step S18). At thistime, by pressing the solder 40 from above with the tool 50, thesemiconductor laser 60 is fixed so that the position thereof is aligned.

FIG. 6 is a schematic top view illustrating a state where thesemiconductor laser 60 is mounted on the solder 40. In FIG. 6, thesemiconductor laser 60 is indicated by hatching, and the tool 50 isomitted. In the present embodiment, the carrier 30 is located withfixing jigs 76 and 78 arranged in a lateral direction thereof. However,the semiconductor laser 60 may be mounted without using the fixing jigs.

Next, as illustrated in FIG. 3C, the tool 50 is separated from thesemiconductor laser 60 (Step S20). At this time, the semiconductor laser60 is in a state fixed on carrier 30 by the solidified solder 40. Next,as illustrated in FIG. 3D, the solder 40 is melted again by the heaterblock 80 in the state where the tool 50 is separated from thesemiconductor laser 60 (step S22). It is desirable to set a temperatureof remelting to 310-320° C., and set a time period of remelting to 3-6seconds. Thus, the reason why the setting temperature of the remeltingis set higher than that of the first melting is that AuSn of the solder40 and Au of metal of a chip backside melt, a rate of Au increases, andhence the temperature needed for the remelting rises. However, when thetemperatures of the first melting and the remelting are similarly set to310-320° C., it is desirable to set the time period of the first meltingto 3 seconds or less. Preferably, it is desirable to set the time periodof the first melting to 2-3 seconds.

When the solder 40 melts, the carrier 30 on which the semiconductorlaser 60 is mounted is taken out from the storage 70, and the solder 40is again solidified by natural cooling, for example, leaving the carrier30 on a heat sink (radiator). As another method of the natural cooling,heating of the heater block 80 may be stopped (step S24). In the presentembodiment, the natural cooling is used as a recooling method. However,when cool time is shortened, the cooling may be performed by nitrogengas as is the case with the first cooling. In addition, the firstembodiment explains an example in which AuSn is used as the material ofthe solder 40. However, even when the material of the solder 40 isdifferent material e.g. AuGe, the temperature of the remelting is higherthan that of the first melting. Therefore, the setting temperature ofthe remelting of the heater block 80 is set higher than that of thefirst melting, so that the remelting can be performed easily.

In the method for fabricating the optical semiconductor device, thesemiconductor laser 60 is mounted on the melted solder 40, cooled once,and hence the melted solder 40 is solidified. Moreover, the solidifiedsolder 40 is remelted and recooled, and hence the melted solder 40 isresolidified. At the time of the first cooling, the semiconductor laser60 is pressed against the carrier 30 with the tool 50. Therefore, thepressure concentrates in a central portion of solder 40, and distortionoccurs in the solder 40. However, at the time of the recooling, the tool50 is separated from the semiconductor laser 60. Therefore, the pressureapplied from the semiconductor laser 60 to the solder 40 becomesuniform, and the distortion of the form of the solder 40 is eliminated.Then, the recooling is performed in the state where the distortion ofthe solder 40 is eliminated, so that the solder 40 is solidified withoutthe distortion. As a result, it is possible to restrain warpage of thesemiconductor laser 60 after cooling.

FIGS. 7A and 7B are schematic cross-sectional diagrams illustrating theabove-mentioned effects. FIG. 7A illustrates the optical semiconductordevice fabricated by a conventional method. FIG. 7B illustrates theoptical semiconductor device fabricated by the method of the presentembodiment. Conventionally, since correct positioning on the carrier wasrequired to fix the optical device, the optical device was fixed withkeeping the tool pressing so that the position of the optical device mayalign. However, as illustrated in FIG. 7A, the semiconductor laser 60has a large size, compared to the tool. Therefore, when the solder 40 iscooled in the state where the central portion of the semiconductor laser60 is pressed with the tool 50 as is the case with the conventionalmethod, distribution of the solder 40 becomes uneven by the pressure ofthe tool 50, the distortion occurs in the solder 40. As a result, thesemiconductor laser 60 mounted on the solder 40 also warps and issolidified. In addition, since the semiconductor laser 60 is formed in arectangular parallelepiped, the distribution of the solder 40 becomesmore uneven, the distortion also occurs in the solder 40, and thesemiconductor laser 60 mounted on the solder 40 also further warps.

On the contrary, in the present embodiment, since the tool 50 isseparated from the semiconductor laser 60 in the state where the solder40 is melted, as illustrated in FIG. 7B, the distortion of the solder 40is restrained, and hence the warpage of the semiconductor laser 60 isalso restrained. In the present embodiment, the cooling is performed inthe state where the positioning is performed once, the melted solder 40is solidified, remelted and then recooled, and hence the melted solder40 is resolidified. As a result, the influence of a positional deviationis also small.

If the warpage of the semiconductor laser 60 is large as in theconventional example, a characteristic thereof worsens. This is because,when the semiconductor laser 60 warps, an optical path (the activitylayer 3, the optical waveguide layer 4, and optical amplification layer19) in the inside of the semiconductor laser 60 also warps, and hence alaser cannot be output according to a desirable optical path.Especially, since the semiconductor laser 60 is a tunable laser usingthe vernier effect, a deviation occurs in the reflection peak wavelengthof the SG-DFB region A or the reflection peak wavelength of the CSG-DBRregion B when the warpage occurs as in the conventional example.Therefore, deterioration occurs in a cross protection of the verniereffect, and a desirable wavelength is not selected. Thus, since thesemiconductor laser 60 is the tunable laser, the warpage of the chip canbe restrained and deterioration of the characteristic can be restrainedby using the fabrication method of the present embodiment.

FIG. 8 is a graph indicating a measurement result of a warpage amount. Ahorizontal axis of the graph indicates positions in a width direction ofthe semiconductor laser 60, and a vertical axis of the graph indicatespositions (the warpage amount of the semiconductor laser 60) in a heightdirection of the laser. In the present embodiment, the semiconductorlaser 60 of 3500 μm in length, 500 μm in width, and 100 μm in height isused. The surface of the solder 40 before the melting is located in thevicinity of a scale of 116 μm in the vertical axis. A dotted line graphindicates the measurement result of the warpage amount in theconventional example, and a solid line indicates the measurement resultthereof in the present embodiment, respectively. It is known that, inthe conventional example, the graph greatly dents at the central portionof the semiconductor laser 60, as illustrated in FIG. 8, and the warpageof the solder 40 and the semiconductor laser 60 is large. On thecontrary, it is known that the warpage amount of the central portion isgreatly small in the present embodiment, compared to the conventionalexample, and a boundary face of the solder 40 and the semiconductorlaser 60 is wholly uniform. Moreover, in the present embodiment, thesame effect can be obtained even when the semiconductor laser 60 of 3000μm in length, 500 μm in width, and 100 μm in height is used.

Second Embodiment

A second embodiment is an example when the remelting and the recoolingof the solder are not performed.

FIG. 9 is a flowchart of the method for fabricating the opticalsemiconductor device according to the second embodiment. Since the stepsS30 to S36 are the same as the steps S10 to S16 of FIG. 2, descriptionthereof is not omitted. In the second embodiment, the tool 50 isseparated from the semiconductor laser 60 before the first melting ofthe solder 40 is performed (step S38). Thereby, the semiconductor laser60 is placed on the melted solder 40 (this is the same as FIG. 3D).Then, the solder 40 is cooled in the state where the tool 50 isseparated from the semiconductor laser 60, and the melted solder 40 issolidified (step S40). The solder 40 may be cooled by the naturalcooling, or the nitrogen gas to shorten the cool time.

According to the method for fabricating the optical semiconductor deviceof the second embodiment, the tool 50 is separated from thesemiconductor laser 60 at the time of the cooling of the solder 40 as isthe case with the first embodiment, and hence the warpage of thesemiconductor laser 60 after the cooling can be restrained. Since theremelting and the recooling are not performed, the number of stepscorresponding to the remelting and the recooling can be reduced,compared to the first embodiment. However, according to the method ofthe first embodiment, since the semiconductor laser 60 is pressed withthe tool 50 at the time of the first cooling, the positioning of thesemiconductor laser 60 can be performed more accurately.

Third Embodiment

A third embodiment is an example in which a solder accumulation portionis provided on the surface of the carrier.

FIG. 10 is a top view of the optical semiconductor device according to athird embodiment, and illustrates a state where the semiconductor laser60 is mounted on the carrier 30. In FIG. 10, a detailed pattern on thesemiconductor laser 60 is omitted, and the solder 40 is indicated byhatching. As illustrated in FIG. 10, a solder accumulation portion 32for accumulating a redundant solder is provided at the periphery of aregion on which the semiconductor laser 60 is mounted. The solderaccumulation portion 32 extends in a direction intersecting alongitudinal direction of a mounted region of the semiconductor laser 60from the central portion of the mounted region of the semiconductorlaser 60.

In the optical semiconductor device according to the third embodiment,the semiconductor laser 60 is mounted on the carrier 30 by the samesteps as the first or second embodiment. At this time, in the stepswhere the solder 40 is melted, cooled and then solidified, the solder 40is supplied from the solder accumulation portion 32 to a region thatruns short of the solder 40 between the semiconductor laser 60 and thecarrier 30. On the contrary, the solder 40 is discharged from a regionwhere the solder 40 remains, to the solder accumulation portion 32.Thus, the solder accumulation portion 32 is provided, so that adeviation amount of the solder 40 between the semiconductor laser 60 andthe carrier 30 can be reduced, and distortion of the solder 40 at thetime of the cooling can be restrained. As a result, the warpage of thesemiconductor laser 60 can be further restrained, compared to the firstand the second embodiments.

The solder accumulation portion 32 is provided at the periphery of themounted region of the semiconductor laser 60, but the position of thesolder accumulation portion 32 is not limited to the position asindicated by the present embodiment. In the method for fabricating theoptical semiconductor device according to the first and the secondembodiments, the central portion of the semiconductor laser 60 in thelongitudinal direction is hold with the tool 50. Therefore, it ispreferable that the solder accumulation portion 32 is formed at a midwayposition in the longitudinal direction of the mounted region of thesemiconductor laser 60. It is more preferable that the solderaccumulation portion 32 is formed in the vicinity of the central portionof the semiconductor laser 60 to which the pressure from the tool 50 isapplied.

In the first to third embodiments, the example in which thesemiconductor laser 60 is mounted on the carrier 30 is explained, butthe present invention can be applied to also the case where a laserother than the semiconductor laser 60 or an optical component other thana laser (e.g. a light emitting element, a light receiving element, anetalon, an isolator, or the like) is mounted on the carrier with thesolder. In addition, a device other than the tool 50 illustrated in thefirst and the second embodiments may be used as a method for holding theoptical component. Moreover, a material other than AuSn (e.g. AuGe,AgSn, or the like) may be used as the material of the solder.

The present invention is not limited to the specifically describedembodiments and variations but other embodiments and variations may bemade without departing from the scope of the claimed invention.

1. A method for fabricating an optical semiconductor device, comprising:melting a solder supplied on a carrier; mounting a semiconductor laserchip on the melted solder with a tool for holding the semiconductorlaser chip; cooling the solder; releasing the tool from thesemiconductor laser chip after the solder is cooled; remelting thesolder after the tool is released from the semiconductor laser chip; andrecooling the remelted solder.
 2. The method for fabricating the opticalsemiconductor device according to claim 1, wherein the cooling isnatural cooling.
 3. The method for fabricating the optical semiconductordevice according to claim 1, wherein the cooling is cooling by blowinggas.
 4. The method for fabricating the optical semiconductor deviceaccording to claim 1, wherein the carrier includes a mounted region onwhich the semiconductor laser chip is mounted, and a solder accumulationportion that extends in a direction intersecting a longitudinaldirection of the mounted region.
 5. The method for fabricating theoptical semiconductor device according to claim 1, wherein a length ofthe longitudinal direction of the semiconductor laser chip is equal toor more than 6 times of a width thereof.
 6. The method for fabricatingthe optical semiconductor device according to claim 1, wherein a longside of the semiconductor laser chip is equal to or more than 3.0 mm. 7.The method for fabricating the optical semiconductor device according toclaim 1, wherein a metal of a backside of the semiconductor laser chipis Au, and a temperature of the remelting is higher than a temperatureof the mounting of the semiconductor laser.
 8. The method forfabricating the optical semiconductor device according to claim 1,wherein the solder is AuSn, a melting temperature and a remeltingtemperature are 310-320° C., and a interval between the mounting of thesemiconductor laser chip and startup of the cooling is equal to or lessthan 3 seconds.
 9. A method for fabricating an optical semiconductordevice, comprising: melting a solder supplied on a carrier; mounting asemiconductor laser chip on the melted solder with a tool for holdingthe semiconductor laser chip, a length of the longitudinal direction ofthe semiconductor laser chip being equal to or more than 6 times of awidth thereof; releasing the tool from the semiconductor laser chip in astate where the solder is melted; and cooling the solder in a statewhere the tool is released from the semiconductor laser chip.
 10. Themethod for fabricating the optical semiconductor device according toclaim 9, wherein a long side of the semiconductor laser chip is equal toor more than 3.0 mm.
 11. The method for fabricating the opticalsemiconductor device according to claim 1, wherein the semiconductorlaser chip is a tunable laser.
 12. The method for fabricating theoptical semiconductor device according to claim 1, wherein the tool isin contact with a surface of a region excluding a stripe-like activeregion in the semiconductor laser chip, and holds the semiconductorlaser chip.
 13. The method for fabricating the optical semiconductordevice according to claim 1, wherein the melting is carried out byplacing the carrier on a heater block.
 14. The method for fabricatingthe optical semiconductor device according to claim 1, wherein thesolder is AuSn, AuGe or AgSn.
 15. The method for fabricating the opticalsemiconductor device according to claim 2, wherein the natural coolingis carried out by placing the carrier on a heat sink.
 16. The method forfabricating the optical semiconductor device according to claim 3,wherein the gas is nitrogen gas.
 17. The method for fabricating theoptical semiconductor device according to claim 4, wherein the solderaccumulation portion is a center portion in the direction intersectingthe longitudinal direction of the mounted region.
 18. The method forfabricating the optical semiconductor device according to claim 4,wherein the solder accumulation portion is rectangle.
 19. The method forfabricating the optical semiconductor device according to claim 9,wherein the solder is AuSn, AuGe or AgSn.
 20. The method for fabricatingthe optical semiconductor device according to claim 9, wherein themelting is carried out by placing the carrier on a heater block.